Competition Hall of Fame

The student EDA competition has been a vital, thrilling, and dynamic event that has taken place in SMACD conferences since the 2012 edition with one unique goal: “Improving design automation for integrated circuits and systems.” The SMACD EDA Competition required submitting a full paper, a presentation by the contesting student(s), and a live demonstration of the EDA tool. The contestants then enrolled in a challenging discussion with a jury panel of industry, academia, and IEEE CEDA members. The jury distinguished the best applications, and a monetary prize of $1,000 has been awarded to the winners of SMACD’s EDA Competition.

Submit your work and become the newest member of SMACD’s hall of fame!!

2021: Erfurt, Germany @ sponsored by IEEE CEDA

The 2021 awarded tools were:

1.

"Trash or Treasure? Machine-Learning PCB layout anomaly detection with AnoPCB," presented by Henning Franke, Technische Universität Ilmenau.

3.

"A Deep Learning Toolbox for Analog Integrated Circuit Placement," presented by António Gusmão, Instituto de Telecomunicações, Universidade de Lisboa.

2019: Lausanne, Switzerland @ sponsored by IEEE CEDA

The 2019 awarded tools were:

Winner

“TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level,” presented by Pablo Saraza-Canflanca, IMSE-CNM, CSIC and Universidad de Sevilla, Spain

Runner up

“Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application,” presented by Julian Leonhard Sorbonne, Université, CNRS, LIP6, France

2018: Prague, Czech Republic @ sponsored by IEEE CEDA

The 2018 awarded tools were:

3.

2017: Giardini Naxos - Taormina, Italy @ co-sponsored by IEEE CEDA and IEEE CAS

The 2017 awarded tools were:

Winner

"A New Method for the Analysis of Movement Dependent Parasitics in Full Custom Designed MEMS Sensor," presented by Axel Hald, Automotive Electronics, Robert Bosch Reutlingen.

Runner up

"CASE: A Reliability Simulation Tool for Analog ICs," presented by Pablo Martín-Lloret, Instituto de Microelectronica de Sevilla.

Runner up

"Automated Generation of System-Level AMS Operating Condition Checks: Your Model's Insurance Policy," presented by Georg Gläser, Insitut fur Mikroelektronik und Mechatronik Systeme gemeinnutzige.

2016: Lisbon, PT @ sponsored by IEEE CEDA

The 2016 awarded tools were:

Winner

"SCALES: A High Speed Simulator Tool for Pipeline A/D Converters," presented by Carlos Silva, Instituto Politécnico de Tomar (Ex Aequo).

Winner

"SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization," presented by Fábio Passos, Instituto de Microelectrónica de Sevilla (Ex Aequo).

Runner up

"Safety-oriented Mixed-Signal Verification of Automotive Power Devices in a UVM Environment," presented by Sebastian Simon, Infineon Technologies AG, Munich (Runner up),

Runner up

"A Novel Polygon-Based Circuit Extraction Algorithm for Full Custom Designed MEMS Sensors," presented by Axel Hald, Automotive Electronics, Robert Bosch Reutlingen (Runner up),

2015: Istanbul, Turkey @ sponsored by IEEE CEDA

The 2015 awarded tools were:

1.

"AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation," presented by Ricardo Martins, Instituto de Telecomunicações, Universidade de Lisboa.

2.

"Automation of FPGA Performance Monitoring and Debugging Using IP-XACT and Graph-Grammars," presented by Munish Jassi, Institute for Electronic Design Automation Technische Universitat Munchen.

3.

"Radix-2r Arithmetic for FIR Filter Design Optimization," presented by Ahmed Liacha, Centre de Développement des Technologies Avancées System Architecture and Multimedia Division, Algiers.

2012: Seville, Spain @ sponsored by IEEE CEDA

The 2012 awarded tools were:

1.

“UVM-based Verification of Smart-Sensor Systems,” presented by Felix Neumann, Technical University of Ilmenau.

2.

“Systematic Generation of Performance Models of Reconfigurable Analog Circuits,” presented by Manuel Velasco-Jimenez, University of Seville.

3.

“An Automated Layout-Aware Design Flow,” presented by Antonio Toro-Frías, University of Sevilla (Ex Aequo).

Honourable Mention

“AIDA: Automated Analog IC Design Flow from Circuit Level to Layout,” presented by Nuno Lourenço, Instituto de Telecomunicações, Universidade de Lisboa.


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