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SMACD 2026 Keynote Speaker

Joachim Glas

Principal Engineer • Infineon Technologies

Joachim Glas
Joachim Glas

Principal Engineer

Infineon Technologies, Munich, Germany
Mixed-Signal Verification Generative AI for IC Design
Keynote Presentation

AI Transformation in IC Development

An Industrial Perspective on Reshaping Verification Methodology in the Generative-AI Era

The fastest methodology shift IC development and verification have ever seen is already underway — this talk looks at it through the lens of verification: what works, what breaks, and what we still don't know.

Abstract

Generative and agentic AI are entering IC design and verification flows at a pace the EDA industry has not seen for decades, reshaping the entire IC development flow and — the focus of this talk — all domains of pre-silicon verification as well as post-silicon bring-up.

This keynote shares industrial experience on what really changes when AI work assistants, RAG-based knowledge systems and EDA tools are wired together via different APIs. It covers the challenges we face, the learnings we have drawn, the guardrails — architectural, compliance and human-in-the-loop — that proved indispensable, and our current focus in building an AI-based verification methodology.

A concrete example on generating SystemVerilog real-number models from schematics, specifications or other source models illustrates where domain knowledge, not the LLM, remains the semiconductor industry's competitive edge.

The talk also discusses the risks that generative AI brings into the IC design flow and closes with open questions for the SMACD community on how academia and industry can jointly shape the next generation of AI-augmented verification flows.

Biography

Joachim Glas is a Principal Engineer at Infineon Technologies in Munich, where he focuses on pre-silicon verification methodology for IC design, with a strong background in mixed-signal verification.

He started his career nearly 30 years ago at Siemens Semiconductors, which later became Infineon Technologies, and has worked across digital, analog and mixed-signal verification ever since.

From 2011 to 2018 he was with Intel as Program Manager for the analog/mixed-signal IC design flow before returning to Infineon.

His current work centers on bringing generative and agentic AI into industrial verification flows, with a particular interest in the interplay between commercial EDA tools and Infineon's in-house design flow.

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