EDA Competition Candidates
” Co-Simulation for Automated Optimization of Integrated Cryogenic Qubit Electronics”
presented by Lotte Geck
“An LLM-assisted Analog IC Design Tool with Automatic Topology Selection and Circuit Sizing”
presented by Anh Nguyen
“A Scalable Authentication Scheme for Detecting Unauthorized Dice in A Multi-Die IC”
presented by Zheng-Hao Wang
“Technology-independent Layout Generator of Industry-grade Power Devices Validated Down to 22-nm Nodes”
presented by Duarte Marques
“RadiSPICE-L: A Layout-Centric Tool for Radiation-Aware Analog Circuit Design”
presented by Ömer Muhikancı
“ATOMIC: Automatic Tool for Memristive IMPLY based Circuit-level Simulation and Validation”
presented by Fabian Seiler
EDA Award
“ATOMIC: Automatic Tool for Memristive IMPLY based Circuit-level Simulation and Validation”
presented by Fabian Seiler
