SMACD 2025

Abstract: This tutorial session delves into cutting-edge verification methodologies for modern SoC and processor designs, focusing on the open-source RISC-V architecture and the rising prominence of formal verification. Attendees will discover how flexible, yet increasingly complex RISC-V architectures demand advanced verification frameworks, such as constrained random testbenches and Universal Verification Methodology (UVM), to ensure high coverage and uncover latent design issues. In parallel, the session examines formal verification’s ability to exhaustively explore design state spaces, uncover corner-case defects more efficiently than traditional simulations, and provide mathematical guarantees of correctness. By uniting these themes, the tutorials illustrate how next-generation verification approaches can meet the mounting challenges of today’s heterogeneous, high-performance systems.

Target Audience :This tutorial is ideal for verification engineers, SoC architects, researchers, and technical professionals who want to stay at the forefront of RISC-V verification and learn how formal verification can complement or enhance traditional simulation-based methodologies. Attendees will gain practical insights into emerging techniques, tools, and best practices in verifying complex processor and SoC designs.

Organizer/Company: ANKASYS
Date & Time: (TBD, 90 minutes)
Location: (TBD)

Tutorial 3: ML Accelerators on FPGAs – A Journey from Manual Design to AI-Assisted Workflows

Abstract: This tutorial offers a deep dive into the evolving landscape of FPGA-based machine learning acceleration, where manual RTL development and AI-assisted workflows converge to address escalating performance and design complexity demands. Participants will discover how FPGAs have become a prime choice for ML deployments, thanks to their reconfigurability, energy efficiency, and ability to achieve low-latency processing. The session begins with a foundational overview of traditional, manually driven design and verification strategies—highlighting key architectural considerations and optimization methods—before transitioning to the game-changing role of Large Language Models (LLMs) in generating and verifying HDL code. Real-world case studies illustrate how these AI-assisted techniques reduce development time, enhance reliability, and streamline debugging. By uniting conventional expertise and AI-driven innovation, this tutorial presents a balanced perspective on building next-generation, high-performance hardware accelerators tailored for today’s most demanding ML workloads.

Target Audience :This tutorial is ideal for verification engineers, SoC architects, researchers, and technical professionals who want to stay at the forefront of RISC-V verification and learn how formal verification can complement or enhance traditional simulation-based methodologies. Attendees will gain practical insights into emerging techniques, tools, and best practices in verifying complex processor and SoC designs.

Organizer/Company: University of Siegen
Date & Time: (TBD, 90 minutes)
Location: (TBD)

SPECIAL SESSIONS

Special Session 1: Alternative Emerging Microsystems: MEMS, Microfluidics, and Photonic ICs

This session is dedicated to the collection of papers, on relevant topics including, but not limited to: Antenna and amplifier designs through ML techniques at various frequency domains, Employing ML for designing and optimizing high-dimensional radiating elements, Artificial neural network-based modeling of microwave devices, Deep neural networks for designing active and/or passive designs, and Automated designs with the help of ML technology.

Keywords: Synthesis, modeling, analysis, simulations methods, and applications of MEMS, Microfluidics, Photonic Integrated Circuits
Organizer:  Assoc. Prof. Onur Ferhanoğlu, TR (ferhanoglu@itu.edu.tr)

Special Session 2: Machine Learning and Intelligent-Based Methods for the Design of RF Power Amplifiers and Antennas

This session is dedicated to the collection of papers, on relevant topics including, but not limited to: Antenna and amplifier designs through ML techniques at various frequency domains, Employing ML for designing and optimizing high-dimensional radiating elements, Artificial neural network-based modeling of microwave devices, Deep neural networks for designing active and/or passive designs, and Automated designs with the help of ML technology.

Keywords:  AI, DL, ML, optimization, modeling, antenna, power amplifier
Organizers:  Assoc. Prof. Lida Kouhalvandi, TR (lkouhalvandi@dogus.edu.tr)
                     Prof. İsmail Serdar Özoğuz, TR (ozoguz@itu.edu.tr )
                     Prof. Ladislau Matekovits, IT (ladislau.matekovits@polito.it )

Special Session 3: Advancements in Neuromorphic Systems: Circuit Development and Applications

This session focuses on advances and innovations in neuromorphic systems, emphasizing the design, development, and implementation of brain-inspired circuits. It includes hardware implementations of neuromorphic architectures that mimic biological neural networks. These would include the integration of analog, digital, and mixed-signal circuits.

Keywords:  Neuromorphic, analog, systems, design, brain-inspired, hardware
Organizers:  Prof. Neslihan Şengör, TR (sengorn@itu.edu.tr)
Prof. Burcu Erkmen, TR (bkapan@yildiz.edu.tr)

Special Session 4: Novel Circuit Techniques and Design Methodologies for Accuracy Improvement of Digital-to-Analog and Analog-to-Digital Converters

This session focuses on recent advances in the design of high-accuracy and robust DACs and ADCs for diverse applications, including healthcare, quantum computing, and harsh environments. It covers novel architectures, advanced calibration techniques, optimized methodologies, and AI-powered enhancements, addressing challenges in resolution, linearity, and reliability. The session aligns with the SMACD conference’s modeling and design focus, appealing to both academic and industrial audiences across fields like analog design, mixed-signal systems, and VLSI.

Keywords: DAC, DAC, calibration, mismatch, assisted design
Organizers: Dr. Francesco Gagliardi, IT (francesco.gagliardi@ing.unipi.it)
                    Dr. Michele Dei, IT (michele.dei@unipi.it )

Special Session 5: Next-Generation Design Methodologies for High-Efficiency Sensor Systems

This session addresses the growing need for energy-efficient sensor systems by showcasing advancements in automated design, ultra-low-power technologies, and edge AI. It highlights practical innovations and system-level optimization, fostering collaboration and equipping researchers/engineers/circuit designers with tools for next-generation solutions.

Keywords: Energy-Efficient, Sensors, EDA, Ultra-Low-Power, AI, Optimization
Organizer: Prof. Ralf Sommers, DE (ralf.sommer @imms.de)

SPECIAL ISSUE

The authors of selected papers presented at the SMACD 2025 conference will have the opportunity to submit an extended version of their manuscript to a Special Issue of the International Journal of Electronics and Communications (AEU:Q2,IF:3.0). These extended papers will undergo a full peer-review process. To support the timely dissemination of research, selected manuscripts will be fast-tracked for review and publication, aiming for a scheduled publication process.

Areas of Interest (not limited)

CAD and EDA Methodologies and Tools for AMS Systems (CAD/EDA)