Hall of fame
Honours from past editions
Best Paper Awards
2026
Dresden, Germany
Best Paper
“Detecting IC Reuse via Reflow-Exposure Fingerprints in Pre-Stressed Ring Oscillators”
Pablo Quintero Viejo·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
Best Paper Runner-Up
Jeonghoon Min·Korea Aerospace University, South Korea
Best Paper Honorable Mention
Carlos Almeida·Instituto Superior Técnico, Universidade de Lisboa, Portugal
2025
Istanbul, Türkiye
Best Paper
“SPFD-Based Delay Resynthesis”
Andrea Costamagna, Chang Meng and Giovanni De Micheli·EPFL, Switzerland
Best Paper Runner-Up
“Circuit-Level Modeling and Simulation of Read Disturbance Phenomena: RowHammer and RowPress”
Eda Deniz Demirel, Engin Afacan and Günhan Dündar·Boğaziçi University and Gebze Technical University, Türkiye
Best Paper Honorable Mention
“Towards a Reliable PUF Using Organic Thin-Film Transistors”
Fernando de los Santos Prieto, Deborah Eric, Marc Porti, Rafael Castro López, Elisenda Roca, Francisco V. Fernández and Montserrat Nafría·IMSE-CNM (CSIC, Universidad de Sevilla) and Universitat Autònoma de Barcelona, Spain
2024
Volos, Greece
Best Paper
“Method, Testing Procedure and System for the Experimental Characterization of Power Inductors”
Nicola Femia·University of Salerno, Italy
Best Paper Runner-Up
“Harvesting RTN for True Random Number Generators and Physical Unclonable Functions”
Francisco Rubio-Barbero·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
Best Paper Honorable Mention
“A Learning-Based Method for Performance Optimization of Timing Analysis”
Anastasis Vagenas·University of Thessaly, Greece
2023
Funchal, Portugal
Best Paper DES
Gunhan Dundar·Boğaziçi University, Türkiye
Runner-up DES
“Design and Implementation of a GPU-Based Digital Predistortion Linearizer for RF Power Amplifiers”
Wantao Li·Universitat Politècnica de Catalunya, Spain
Runner-up ETA
Juan Núñez·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
Best Paper CAD/EDA
“Synthesizable ADPLL Generator: From Specification to GDS”
Kyumin Kwon·University of Michigan, USA
Runner-up CAD/EDA
Andres Santana-Andreo·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
2022
Sardinia, Italy
Best Paper
“Exploiting Saturable Inductors in SEPIC Regulators”
Nicola Femia·University of Salerno, Italy
Best Paper Runner-up
“Machine Learning Approaches for Transformer Modeling”
Fabio Passos·Instituto de Telecomunicações, Portugal
YP Best Paper
“Multi-harvesting smart solution for self-powered wearable objects”
Malek Teib·STMicroelectronics, France
WiCAS Best Paper
“Accelerating Electromigration Stress Analysis Using Low-Rank Balanced Truncation”
Olympia Axelou·University of Thessaly, Greece
IC Design Contest
2026
Dresden, Germany
Winner
Duarte Marques·Instituto Superior Técnico, Portugal
2025
Istanbul, Türkiye
Winner
“An Energy-Efficient Analog Integrated Neural Network for Cirrhosis Patient Survival Prediction”
Konstantinos Cheliotis·National Technical University of Athens, Greece
2024
Volos, Greece
Sponsored by MDPI
Winner
“Two Stage Diode-String Architecture for Ultra-Low Power Digital to Analog Converters”
Andreas Tsiougkos·Aristotle University of Thessaloniki, Greece
Winner
“Rapid Prototyping Platform for Integrated Circuits for Quantum Computing”
Jonas Mair·ZEA-2, Germany
2023
Funchal, Portugal
Sponsored by MDPI (co-sponsor)
Winner
“Paving the Way for the Electronic Design Automation of Power Management Units”
Carlos Santos·IST-ULisboa, INESC-ID, Portugal
EDA Competition
The student EDA competition has been a vital, thrilling and dynamic event at SMACD since the 2012 edition, with one goal: “Enhance design automation for integrated circuits and systems.” It requires a full paper, a presentation by the contesting student(s) and a live demonstration of the EDA tool, followed by a challenging discussion with a jury of industry, academia and IEEE CEDA members, who distinguish the best applications. The winners of the SMACD EDA Competition receive a prize of $1,000.
M.Sc. or Ph.D. student? Compete in 2027. Enter the SMACD 2027 EDA Competition in Seville for the $1,000 award and your place on this list. Paper deadline: 19 February 2027.2026
Dresden, Germany
Winner
“Continuous-Time Bandpass Filter Design, Modeling & Analysis Tool on MATLAB”
Utku Arda Akinci·Boğaziçi University, Türkiye
2025
Istanbul, Türkiye
Winner
“ATOMIC: Automatic Tool for Memristive IMPLY based Circuit-level Simulation and Validation”
Fabian Seiler·TU Wien, Austria
2024
Volos, Greece
Sponsored by IEEE CEDA
Winner
“Area-Aware Logic Mapping for MAGIC based In-Memory Computing”
Jiaxiang Pan·Ningbo University, China
Winner
“Fast ML-driven Analog Circuit Layout using Reinforcement Learning and Steiner Trees”
Davide Basso·University of Trieste, Italy
2023
Funchal, Portugal
Sponsored by IEEE CEDA
Winner
“Single-Electron-Transistor Compact Model for Spin-Qubit Readout”
Samantha van Rijs·Delft University of Technology, Netherlands
Winner
“RapidIP – Fast & Universal Synthesis of RF-Circuits”
David Bierbuesse·RWTH Aachen University, Germany
2022
Sardinia, Italy
Sponsored by IEEE CEDA
Winner
“A Design Flow and EDA-Tool for an Automated Implementation of ASIC Configuration Interfaces”
Johannes Bastl·RWTH Aachen University, Germany
2021
Erfurt, Germany
Sponsored by IEEE CEDA
1st place
“Trash or Treasure? Machine-Learning PCB layout anomaly detection with AnoPCB”
Julian Kuners·Technische Universität Ilmenau, Germany
2nd place
“Adaptive Test Bench Generation, Simulation and Parameter Extraction for AMS Circuitry”
Alexander Meyer·RWTH Aachen University, Germany
3rd place
“A Deep Learning Toolbox for Analog Integrated Circuit Placement”
António Gusmão·Instituto de Telecomunicações, Universidade de Lisboa, Portugal
2019
Lausanne, Switzerland
Sponsored by IEEE CEDA
Winner
Pablo Saraza-Canflanca·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
Runner-up
“Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application”
Julian Leonhard·Sorbonne Université, CNRS, LIP6, France
2018
Prague, Czech Republic
Sponsored by IEEE CEDA
1st place
“SETA: A CAD tool for Single Event Transient Analysis and Mitigation on Flash-based FPGAs”
Sara Azimi·Politecnico di Torino, Italy
2nd place
Umberto Garlando·Politecnico di Torino, Italy
3rd place
“ReSeMBleD – Methods for Response Surface Model Behavioral Description”
Maike Taddiken·University of Bremen, Germany
2017
Giardini Naxos – Taormina, Italy
Sponsored by IEEE CEDA and IEEE CAS (co-sponsors)
Winner
“A New Method for the Analysis of Movement Dependent Parasitics in Full Custom Designed MEMS Sensor”
Axel Hald·Automotive Electronics, Robert Bosch Reutlingen, Germany
Runner-up
“CASE: A Reliability Simulation Tool for Analog ICs”
Pablo Martín-Lloret·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
Runner-up
“Automated Generation of System-Level AMS Operating Condition Checks: Your Model’s Insurance Policy”
Georg Gläser·Institut für Mikroelektronik- und Mechatronik-Systeme gemeinnützige GmbH, Germany
2016
Lisbon, Portugal
Sponsored by IEEE CEDA
Winner (ex aequo)
“SCALES: A High Speed Simulator Tool for Pipeline A/D Converters”
Carlos Silva·Instituto Politécnico de Tomar, Portugal
Winner (ex aequo)
“SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization”
Fábio Passos·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
Runner-up
“Safety-oriented Mixed-Signal Verification of Automotive Power Devices in a UVM Environment”
Sebastian Simon·Infineon Technologies AG, Munich, Germany
Runner-up
“A Novel Polygon-Based Circuit Extraction Algorithm for Full Custom Designed MEMS Sensors”
Axel Hald·Automotive Electronics, Robert Bosch Reutlingen, Germany
2015
Istanbul, Türkiye
Sponsored by IEEE CEDA
1st place
“AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation”
Ricardo Martins·Instituto de Telecomunicações, Universidade de Lisboa, Portugal
2nd place
“Automation of FPGA Performance Monitoring and Debugging Using IP-XACT and Graph-Grammars”
Munish Jassi·Institute for Electronic Design Automation, Technische Universität München, Germany
3rd place
“Radix-2r Arithmetic for FIR Filter Design Optimization”
Ahmed Liacha·Centre de Développement des Technologies Avancées, System Architecture and Multimedia Division, Algiers, Algeria
2012
Seville, Spain
Sponsored by IEEE CEDA
1st place
“UVM-based Verification of Smart-Sensor Systems”
Felix Neumann·Technical University of Ilmenau, Germany
2nd place
“Systematic Generation of Performance Models of Reconfigurable Analog Circuits”
Manuel Velasco-Jimenez·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
3rd place (ex aequo)
“An efficient linear-time variant simulation technique of oscillator phase sensitivity function”
Federico Pepe·Politecnico di Milano, Italy
3rd place (ex aequo)
“An Automated Layout-Aware Design Flow”
Antonio Toro-Frías·IMSE-CNM (CSIC, Universidad de Sevilla), Spain
Honourable Mention
“AIDA: Automated Analog IC Design Flow from Circuit Level to Layout”
Nuno Lourenço·Instituto de Telecomunicações, Universidade de Lisboa, Portugal